> That doesn't sound very efficient if all you got is an M-mode-only chip though.
There is approximately a light-year of space between an M-mode-only chip and anything where you'd consider running a hypervisor.
Suggesting that you want a hypervisor is implicitly saying that you already have S and U modes, virtual memory, page tables, MMU etc.
Otherwise you're at much the same point as those news stories about how someone is running RISC-V Linux on an AVR or Pi Pico (original) or vim macros, by writing a RISC-V emulator on one of those.
There is approximately a light-year of space between an M-mode-only chip and anything where you'd consider running a hypervisor.
Suggesting that you want a hypervisor is implicitly saying that you already have S and U modes, virtual memory, page tables, MMU etc.
Otherwise you're at much the same point as those news stories about how someone is running RISC-V Linux on an AVR or Pi Pico (original) or vim macros, by writing a RISC-V emulator on one of those.