I don't know much about that side of the industry so this is only what I've gleamed from mentors and account managers at suppliers: silicon fabrication is extremely conservative and naturally monopolistic because of the sums of money involved and these two factors interact in weird ways. The gross margins on chips are 90%+ but because of the large amounts of upfront capital, they have to strike a balance between derisking the R&D and maximizing profit. Since it is so expensive, demand for specialized chips can only support so many customers per design which limits competition and redesigns are so expensive that clients are locked into their suppliers. The vendors know this and they know that hardware designs are locked in whereas customers have a lot more control over their software so when it comes to derisk the project, investment into software quality is always the first to get cut to the bone. Afterwards, due to that derisking, most of their software engineers spend time chasing bugs in the barebones software and supporting customers so they never get to invest in the software after release before they have to move onto the next product.
This isn't the kind of environment you'd find many passionate software engineers because most of them leave for greener pastures unless they really care about the product they're working on, but they're rarely qualified to run developer experience departments.
Sounds like the silicon fabrication industry is ripe for disruption ala Stripe / Monzo. May be, since you know so much, you should build one. :)
You spoke of the Basebands...that reminded me that Fabrice Bellard works on the other side of the equation [0]. May be, if we are lucky, he turns his attention to fixing mobile phones [1].
I wish! I've actually looked into it and there's lots of interesting work in academia and garages on small scale, low cost silicon fab [1] as well as the electron microscopy necessary to do quality control [2]. Last I checked the state of the art was using regular microscopes with Texas Instruments digital micromirror devices from projectors with basic photoresist and etchant. The DMD reflects light from your light source onto the wafer with the resist and you can control the micromirrors like pixels to only reflect light at the pixels you want to expose the resist. The doping is doable with basic vapor deposition but alignment between steps is brutally hard and the doping requires a lot of tuning and environmental stability to get right so the feature limit is 1 micrometer at best.
I even found a TI 1080p UV DMD and bought a roll of lithographic film to try to get that feature size limit down. My plan was to expose the litho film instead of the wafer directly and build very precise jigs for the film off of a precision machine base I could get for a few grand, with custom built linear motors to move between steps but I got stuck on the physics and math. It looked like I had a solution using neural networks and a DIY laser interferometer as the feedback loop as a shortcut to learning control theory but then got distracted by more urgent matters... c'est la vie
Some very interesting work there, reminds me of Ben Krasnow's lair. You guys should hang out!
I thought the voiceover video for the SEM lithography experiment worked really well ( https://youtu.be/SB94rQtKlKI ). How does the spot size from the SEM compare to the ~1-um resolution you get from the DMD? I assume you're not actually getting 5 nm out of it...?
I've been on silicon side. Because chips are rushed out the door and always behind schedule, and they expect large customers to make 2-3 product lines with it during the chip's lifetime.
Do you know why? In my eyes that would make them a crazy unattractive supplier.